Synopsys’ Ravi Todi, Urmimala Roy, and Xi-Wei Lin examine the current state of gate-all-around transistors, what’s on the horizon with complementary FETs, and how backside power delivery and design technology co-optimization help enable the full benefits of the new architectures. Cadence’s Mayank Bhatnagar notes that AI infrastructure is fundamentally different from traditional data center architectures, with performance no longer defined by peak compute capability but by communication efficiency that is determined by the underlying IP. Siemens’ Harry Foster questions why first-silicon success continues to decline even as verification capabilities increase and whether traditional measures of completion are enough to give confidence in the complete system. Keysight’s Eric Yu explains why the ESUN specification is re-examining whether scale-up networks need an IP layer at all when GPU count and connectivity are fixed at deployment time with no need for routing or IP-address aggregability. Arm’s Odin Shen finds that building a long-running local-first AI assistant requires more than just a model, and suggests an architecture that combines an interaction channel, persistent data, tools, scheduling, and local inference services on infrastructure the developer controls. SEMI’s Anshu Bahadur chats with Vikas Gupta of GlobalFoundries about how detachable fibers, wafer-level photonics, and new multi-source agreements are laying the groundwork for high-volume co-packaged optics. Plus, check out the blogs featured in the latest Manufacturing, Packaging & Materials newsletter: Lam Research’s Swapnil Kailash More details how to pull more wafers back into spec after lithography. Synopsys’ Germain Fenger shows why semiconductor R&D depends on access to high-quality data, realistic process assumptions, and practical learning from silicon. Intel Foundry’s Madison West explains how reducing manufacturing-related emissions can help lower the embedded carbon footprint of chips. SEMI’s Pushkar Apte looks at how reducing energy consumption can lower inference costs and enable emerging physical AI applications. The post Blog Review: Aug. 26 appeared first on Semiconductor Engineering.
Source: https://semiengineering.com/blog-review-aug-26-3/