SE Open DRAM Model For PIM Analysis In 3D DRAM (Georgia Tech)
Posted: Sun Jul 12, 2026 6:37 pm
Researchers from Georgia Institute of Technology published a technical paper titled “Open DRAM Model—Part II: Enabling Processing-in-Memory in 3-D DRAM.” Abstract Excerpt: “In this work, we present an “Open DRAM Model” that enables comprehensive circuit-level analysis of DRAM operations across multiple architectures, including conventional 6F2 BCAT, scaled 4F2 VCT, and monolithically stacked 3-D DRAM. ” Find the technical paper here. June 2026. Note, part one of this paper is here. K. Lee, S. Lim, S. Datta and S. Yu, “Open DRAM Model—Part II: Enabling Processing-in-Memory in 3-D DRAM,” in IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, vol. 12, pp. 144-152, 2026, doi: 10.1109/JXCDC.2026.3704508 The post Open DRAM Model For PIM Analysis In 3D DRAM (Georgia Tech) appeared first on Semiconductor Engineering.
Source: https://semiengineering.com/open-dram-m ... rgia-tech/
Source: https://semiengineering.com/open-dram-m ... rgia-tech/