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By Marc Hutner and Ron Press Artificial Intelligence is rapidly becoming pervasive in society and across semiconductor development processes. We have to be careful not to apply AI to solve optimizations and challenges of existing methods but pair with engineering innovation for evolutionary results. One example is the application of scan test data in multi-core designs. AI can optimize the device IO bandwidth allocation to each core based on the core pattern size. However, an engineering innovation of using a packetized bus for scan data delivery (SSN) resulted in a much more powerful solution. The SSN bus is unprecedented in its ability and flexibility to optimize packets in software for any changes in pattern size or combinations of cores to test in parallel. It also removed the dependency of core scan channel allocation and planning to available top-level IO. Consequently, SSN has quickly become the plan of record for SoC scan data delivery. Since its packetized high-speed bus provides so much flexibility, it has served as an infrastructure for several other new data delivery technologies. We are providing Agentic AI capabilities that work with an engineer for DFT planning, optimizations, debug, and more later this year. For example, when a DFT tool encounters a design rule checking violation, the user often has to look up typical root causes and resolution and run experiments. An Agentic AI assistant can accelerate this process by:

• Identifying likely root causes from documentation and troubleshooting guides
• Correlating violations with known design patterns
• Executing diagnostic experiments automatically
• Proposing potential fixes
• Summarizing confidence levels and expected impact

The engineer remains responsible for the final decision, but the AI dramatically reduces the time required to reach a solution. AI in combination with the packetized data delivery can provide very broad capabilities, bigger than DFT. The next use case may be smarter ways to run tests and apply tests to improve operational awareness. A technology that was introduced a year ago was the In-System Test product. It provides the user with a way to run test content in-situ to the final application. In more basic terms, manufacturing tests run on the blade server and avoid doing an RMA. Imagine a data center with a thousand blade servers and a signal is detected by an agentic monitoring agent. This could be bus functional monitors, temperature sensors, voltage droop or some other kind of event. The agent can direct the scheduler to run a group of tests to determine how the hardware has changed. These tests are provided by the In-System Test hardware through an interface like PCIe. This may determine an action like a core needs to be taken out of service or that an entire blade server is no longer operating effectively. The future of DFT is not AI replacing engineers. Instead, it is AI amplifying engineering expertise. Human innovation will continue to create new test architectures, methodologies, and infrastructure, while AI accelerates optimization, analysis, and decision-making. Together, they create a powerful partnership that extends beyond manufacturing test and into operational intelligence across the entire semiconductor lifecycle, from design and validation to deployment and field operation. Some of the most impactful applications have yet to be imagined. Ron Press is senior director of technology enablement at Siemens EDA. The post Innovation First, AI Second: Lessons From SSN And The Future Of Test appeared first on Semiconductor Engineering.

Source: https://semiengineering.com/innovation- ... e-of-test/