SE Chip Industry Technical Paper Roundup: Aug. 4
Posted: Tue Aug 04, 2026 7:01 am
New technical papers recently added to Semiconductor Engineering’s library: Technical Paper Research Organizations The SpiNNaker2 Chip: A Many-Core Platform for Flexible and Scalable Brain-Inspired Computing 
TU Dresden, University of Manchester Granite: A Modular Methodology for Foundational Verification of Hardware-Software Leakage Contracts MIT, Google, University of Washington NAD Memory: A Hybrid Memory Device Combined with NAND Flash Memory and DRAM University of Seoul Bridging the p-Type Gap in Oxide Electronics with 2D Semiconductors Stanford University, Hanyang University Deployable 3D Architectures from Wafer-Fabricated Precursors University of Houston, Toyota, Imperial College London Benchmarking LLMs for Verilog Design Flows NMIMS Hyderabad, IIT Roorkee, BITS Pilani SPARC: Automated Root-Cause Analysis of Pre-Silicon Power Side-Channel Leakage in the Processor Design Flow University of Lübeck Find more semiconductor research papers here. The post Chip Industry Technical Paper Roundup: Aug. 4 appeared first on Semiconductor Engineering.
Source: https://semiengineering.com/chip-indust ... dup-aug-4/
TU Dresden, University of Manchester Granite: A Modular Methodology for Foundational Verification of Hardware-Software Leakage Contracts MIT, Google, University of Washington NAD Memory: A Hybrid Memory Device Combined with NAND Flash Memory and DRAM University of Seoul Bridging the p-Type Gap in Oxide Electronics with 2D Semiconductors Stanford University, Hanyang University Deployable 3D Architectures from Wafer-Fabricated Precursors University of Houston, Toyota, Imperial College London Benchmarking LLMs for Verilog Design Flows NMIMS Hyderabad, IIT Roorkee, BITS Pilani SPARC: Automated Root-Cause Analysis of Pre-Silicon Power Side-Channel Leakage in the Processor Design Flow University of Lübeck Find more semiconductor research papers here. The post Chip Industry Technical Paper Roundup: Aug. 4 appeared first on Semiconductor Engineering. Source: https://semiengineering.com/chip-indust ... dup-aug-4/